Skills
Technical Skills
Other Unclassified Technical Skills: BIST, RTOS,
Verilog/SystemVerilog
- Strong proficiency in Verilog and SystemVerilog for designing, implementing and verifying RTL designs, with comprehensive internship and college/personal project experiences.
- Skills Acquired From:
- Notable Experiences - Design Verification at AMD, DFT & Post Silicon Validation at Efinix Inc
- Notable Classes - Computer Architecture, Digital Logic Design, Parallel Computer Architecture, MicroArchitecture
- Notable Projects - Out-of-Order Processor, IP Core Library, A.U.R.A ML Accelerator, SpecNN Accelerator for kNN
C and C++ Programming
- Strong proficiency in C/C++ programming across diverse applications, including performance-critical system design, embedded systems, hardware modeling, multithreading, socket programming, and OS-level development.
- Skills Acquired From:
- Notable Classes - Operating Systems, Data Structures & Algorithms, Computer Organization, Programming and Intro Data Structures, Parallel Programming
- Notable Projects - Thread Library, Pager, Multi-Threaded Network File Server, Simple SQL Database, Words Morphing & Optimal Route Finding Algorithm, ML Hardware Accelerator Modeling, Cycle Accurate Pipelined Processor and Cache Simulator
- Notable Experiences - Firmware Engineering at UMich Solar Car, Embedded Systems Team Lead at MHackers
Python (Programming and Scripting)
- Strong proficiency in Python for various system design, GUI development, hardware modeling, prompt engineering programming tasks and automation, flow-integration scripting tasks
- Skills Acquired From:
- Notable Experiences - USB Transaction Python Model and GUI Debug Tool Development at AMD, Automation and Tool-Integration Scripting at Efinix
- Notable Projects - kNN Hardware Accelerator Cycle Accurate Modeling, Verification Flow-Integration Scripting for ML Hardware Accelerator, Prompt Engineering for VSEE
RISC-V and ARM Assembly
- Proficient in the ISA and Assembly of RV32I subset in RISC-V, with experience designing assembler, linker, and the hardware processor for it. Baseline knowledge and understanding of the LEGv8 subset of ARM Assembly.
- Skills Acquired From:
- Notable Classes - Computer Organization, Computer Architecture
- Notable Projects - Assembler & Linker, RISC-V Out-of-Order Processor, RISC-V In-Order Pipelined Processor
Universal Verification Methodology (UVM)
- Working Knowledge of the Universal Verification Methodology (UVM) verfication framework gained from internship experiences and personal project experiences
- Skills Acquired From:
- Notable Experiences - UVM Log Debug Tool Development & UVM Test Sequence Library Refactoring at AMD
- Notable Projects - UVM Test Environment for ALU
Synopsys VCS, Verdi and Design Compiler
- Proficient in the usage of Synopsys tools such as VCS, Verdi, and Design Compiler for RTL simulation, waveform debugging, and synthesis, with experience gained from internships and various college projects
- Skills Acquired From:
- Notable Experiences - Worked with various Synopsys tools for testcase simulation at AMD
- Notable Projects with Synopsys Tools Usage - RISC-V Out-of-Order Processor, A.U.R.A ML Accelerator, SpecNN Accelerator for kNN
- Notable Classes - Computer Architecture, Parallel Computer Architecture, MicroArchitecture
ModelSim, Cadence Xcelium, and QuestaSim
- Strong proficiency in RTL simulation and debugging with ModelSim, gained from college projects, while having basic familiarity with the usage of other simulation tools such as Xcelium and QuestaSim through internships
- Skills Acquired From:
- Notable Projects with ModelSim Usage - Four Function Calculator, Traffic Light Controller, UpDown Counter
- Notable Experiences - RTL simulation with Cadence Xcelium and QuestaSim at Efinix Inc
- Notable Classes - Digital Logic Design
SystemVerilog Assertions (SVA)
- Proficient in utilising SystemVerilog Assertions to build comprehensive verification testbenches/checkers, gained from college project and internship experiences
- Skills Acquired From:
- Notable Projects - SVA Verficiation Framework for RISC-V Out-of-Order Processor Design
- Notable Experiences - SVA Checker Refining at AMD
UNIX/Linux
- Strong proficiency working in UNIX/Linux environments, with comprehensive experiences from college, personal projects, and internships
- Skills Acquired From:
- Notable Experiences with Day-to-Day UNIX/Linux Usage - Design Verification Intern at AMD, DFT & Post-Silicon Validation Intern at Efinix
- Notable Projects developed on UNIX/Linux Environments - RISC-V Out-of-Order Processor Design
- Notable Classes - Computer Science Pragmatics
Git Version Control
- Proficient in the utilisation of version control tools such as Git, with experiences using it for practically all collaborated and personal projects
- Skills Acquired From:
- Notable Experiences - RISC-V Out-of-Order Processor Design, A.U.R.A ML Accelerator
- Notable Classes - Computer Science Pragmatics
Shell Scripting
- Proficient in shell scripting (particularly in Bash) for various purpose including build/compile/test automation, tool integration, flow integration, log extraction, and comparison
- Skills Acquired From:
- Notable Projects - Customized Bash Shell for Better Shell Prompts and Added Functionality, English to Pig-Latin Translation Shell Script, Build, Compile, & Compare Automation Scripting for Processor Design Verification
- Notable Experiences - Compilation & Test Automation Script Development for Auto-Grading 200+ students’ RTL Design
AXI4 Stream/Memory-Mapped/Lite
- Basic familiarity with the AXI4 protocol including the stream, memory-mapped, and lite version, gained from my internship and personal project experiences
- Skills Acquired From:
- Notable Experiences - Centralized Tracker Tool Development (which involves monitoring AXI interfaces of the DMA) at AMD
- Notable Projects - AXI4-Stream Interconnect FIFO